Predicting the Number of Vias and Dimensions of Full-custom Circuits Using Neural Networks Techniques

Block layout dimension prediction is an important activity in many VLSI design tasks (structural synthesis, oorplanning and physical synthesis). Block layout dimension prediction is harder than block area prediction and has been previously considered to be intractable [6]. In this paper we present a solution to this problem using a neural network machine learning paradigm. Our method uses a neural network to predict rst the number of vias and then another neural network that uses this prediction and other circuit features to predict the width and the height of the layout of the circuit. Our approach has produced much better results than those published, dimension (aspect ratio) prediction average error of less than 18% with corresponding area prediction average error of less than 15%. Furthermore, our technique predicts the number of vias in a circuit with less than 4% error on average.